{"id":12550,"date":"2026-07-31T23:38:56","date_gmt":"2026-07-31T23:38:56","guid":{"rendered":"https:\/\/stock999.top\/?p=12550"},"modified":"2026-07-31T23:38:56","modified_gmt":"2026-07-31T23:38:56","slug":"tsmc-is-quietly-borrowing-a-page-from-intels-playbook","status":"publish","type":"post","link":"https:\/\/stock999.top\/?p=12550","title":{"rendered":"TSMC is quietly borrowing a page from Intel&#039;s playbook"},"content":{"rendered":"<p><\/p>\n<p>Companies rarely name a secret internal project after a rival\u2019s product. Doing so hands over the story before it even becomes public: that the smaller competitor built something worth copying.<\/p>\n<p>That is essentially what just happened inside Taiwan Semiconductor Manufacturing.<\/p>\n<p>TSMC engineers are developing a new chip-packaging technology and referring to it internally as \u201cEMIB-like,\u201d according to The Information.<\/p>\n<p>The name borrows directly from Intel\u2019s Embedded Multi-die Interconnect Bridge. For a company that has spent a decade as the undisputed leader in advanced packaging, reaching for a rival\u2019s own vocabulary is a quiet kind of concession.<\/p>\n<p>The industry has been here before. Intel itself was slower than AMD to embrace chiplet-based CPU designs several years ago, then adopted a similar multi-die approach once the model proved itself in the market.<\/p>\n<p>Packaging appears to be following the same pattern. A technique that looks unconventional when a smaller player introduces it tends to become standard once it starts winning contracts.<\/p>\n<p>TSMC\u2019s dominance came with a bottleneck<\/p>\n<p>TSMC currently packages its most advanced AI chips through Chip-on-Wafer-Substrate, or CoWoS, used by customers including Nvidia and AMD, according to Seeking Alpha.<\/p>\n<p>That dominance came with a cost. CoWoS-L capacity is sold out through 2026 and into 2027, with lead times stretching to 78 weeks in some cases, Wccftech reported.<\/p>\n<p align=\"center\">Related: TSMC hikes 2026 guidance as AI demand outpaces capacity<\/p>\n<p>That backlog matters because packaging, not transistor manufacturing, has become the real constraint on AI chip supply. Nomura Securities estimates TSMC\u2019s CoWoS capacity will reach 2 million wafers by 2027, with Nvidia alone consuming roughly 55% of that output, according to BigGo Finance.<\/p>\n<p>Any customer stuck behind that queue has a reason to look elsewhere, even toward a chipmaker it does not normally use.<\/p>\n<p>Intel turned a niche technology into signed contracts<\/p>\n<p>Intel\u2019s EMIB avoids the large silicon interposers, which are the base layers that allow chips to communicate, and on which CoWoS depends. It embeds small silicon bridges only where chiplets need to connect, which lowers material cost and simplifies assembly, based on Seeking Alpha\u2019s reporting.<\/p>\n<p>That pitch has started converting into real business. Intel\u2019s newer EMIB-T variant has reached a 98% yield rate and secured orders from Nvidia, Google, and OpenAI, according to BigGo Finance.<\/p>\n<p>Google has also ordered Intel to package more than three million custom Tensor Processing Units by 2028, and Amazon\u2019s AWS Trainium 3 accelerator is reportedly targeting the same platform, TechTimes reported.<\/p>\n<p>MediaTek went further, adopting a dual-packaging strategy in May 2026 that pairs CoWoS for training chips with EMIB for inference chips, TechTimes confirmed.<\/p>\n<p>None of those wins threaten TSMC\u2019s core business today. Packaging represents only 10% to 15% of TSMC\u2019s roughly $120 billion in annual revenue.<\/p>\n<p>But that understates the stakes, since AI infrastructure spending from cloud hyperscalers is running near $700 billion in 2026, and packaging capacity decides how fast that money turns into shipped chips.<\/p>\n<p>                        TSMC is developing an EMIB-like chip-packaging technology with Kinsus Interconnect to counter Intel, sending both stocks sharply higher on Thursday, July 30.<\/p>\n<p>Narumon Bowonkitwanchai &amp;sol; Getty Images<\/p>\n<p>                    The real prize: customer relationships<\/p>\n<p>Packaging orders are rarely just packaging orders. A customer who trusts Intel to assemble its chip is a customer Intel can also eventually pitch on manufacturing it.<\/p>\n<p>Intel\u2019s foundry business has struggled to land marquee customers, even as its 18A process nears high-volume production this year, according to Reuters. Packaging is Intel\u2019s foothold into accounts it could never win on process technology alone.<\/p>\n<p>More TSMC:<\/p>\n<p>TSMC is about to answer Wall Street\u2019s biggest AI questionTSMC hikes 2026 guidance as AI demand outpaces capacityTSMC\u2019s June revenue jump breaks a four-year seasonal pattern<\/p>\n<p>That is why TSMC\u2019s response looks less like routine research and more like defense of its customer base. Nvidia is already evaluating EMIB for a future processor combining four GPUs into a single package, according to Seeking Alpha.<\/p>\n<p>If Nvidia adopts Intel\u2019s packaging for even one product line, Intel gains entry into the industry\u2019s most important customer relationship.<\/p>\n<p>Markets read the July 30 news accordingly. TSM shares rose about 7.6%, and Intel (INTC) shares jumped roughly 13%.<\/p>\n<p>The dual rally is not a contradiction. TSMC gains a hedge against its own backlog, while Intel gains validation from the one company whose approval matters most in this industry.<\/p>\n<p>Packaging is the new battlefield<\/p>\n<p>The EMIB-like project is one of two packaging moves Intel and TSMC each made within days of each other.<\/p>\n<p>Intel separately signed a memorandum with China\u2019s Lens Technology to explore glass-substrate packaging using through-glass vias, a collaboration Intel says could support AI PCs, data centers, and edge computing, according to Intel\u2019s own announcement.<\/p>\n<p>For decades, the industry measured leadership in nanometers, the size of the transistor a company could manufacture. That race is narrowing as TSMC, Intel, and Samsung converge on similar process nodes.<\/p>\n<p>Packaging is emerging as the next arena where a manufacturing edge still matters, and it is one in which the biggest player is no longer guaranteed to remain ahead just by staying the biggest.<\/p>\n<p align=\"center\">Related: Massive TSMC deal is huge stride for US in high-tech race<\/p>\n<p>#TSMC #quietly #borrowing #page #Intel039s #playbook<\/p>\n","protected":false},"excerpt":{"rendered":"<p>Companies rarely name a secret internal project after a rival\u2019s product. Doing so hands over&#8230;<\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":[],"categories":[259],"tags":[883,10012,3772,3141,555,12129],"_links":{"self":[{"href":"https:\/\/stock999.top\/index.php?rest_route=\/wp\/v2\/posts\/12550"}],"collection":[{"href":"https:\/\/stock999.top\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/stock999.top\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/stock999.top\/index.php?rest_route=\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/stock999.top\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=12550"}],"version-history":[{"count":0,"href":"https:\/\/stock999.top\/index.php?rest_route=\/wp\/v2\/posts\/12550\/revisions"}],"wp:attachment":[{"href":"https:\/\/stock999.top\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=12550"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/stock999.top\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=12550"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/stock999.top\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=12550"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}